1. Technical Field
The present invention relates to a sequence control apparatus and a test apparatus.
2. Related Art
It is known that a sequencer would control the state of a control target (for example, see Patent Documents 1, 2 and 3). Patent Document 1 discloses a sequence control microcontroller that includes a state register for storing thereon, for each channel, a subsequent state according to the condition at the time of the termination of a program and sequentially executes, for each channel, a program corresponding to the state stored on the state register for each channel. Patent Document 2 discloses a programmable controller that divides the entire program into steps, separates the user program into programs representing the transition conditions between the steps and programs representing the operations performed in the steps, and executes a program associated with an active step. Patent Document 3 discloses a controller for controlling a control target, which generates a system event when the controller transits to a next state (for example, when the controller executes a command received from the outside), and performs an event task corresponding to the generated system event.    Patent Document 1: Japanese Patent No. 3871461    Patent Document 2: Japanese Patent No. 2621631    Patent Document 3: Japanese Patent No. 3597396
When a sequencer controls, for example, the pattern of the ON/OFF states of a plurality of relays to transit from a given state (a state X) to the next state (a state Y), the transition from the state X to the state Y may not happen directly but go through one or more intermediate states. In addition, the sequencer may also control the time intervals during which the respective intermediate states are sustained. To perform such a control, the sequencers disclosed in Patent Documents 1, 2 and 3 need control circuits and control programs in correspondence with the respective intermediate states and unavoidably become large in scale.